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Then intermetal dielectric layers and further metal depositions may follow. In industrial practice, passivating oxide, nitride, or oxynitride layers are added by plasma-assisted deposition to protect the chip from impurities and humidity coming from the surroundings. Finally, bondpad areas have to be defined and opened. Summarizing, we can state that only one additional mask is necessary for PIN photodiode integration on P− P+ -substrate in order to block out an originally unmasked P-type threshold implantation, when the CMOS process does not use self-adjusting wells.

To achieve a high speed, the immediate and deferred detectors have to be interdigitated as shown in Fig. 16. A portion of the diffusing minority charge carriers (electrons) photogenerated below the immediate detectors reaches the N-well of the reference (deferred) detector and causes the reference diffusion current. 2 CMOS-Integrated Photodetectors 43 the deferred detector. Otherwise, the diffusion current coming from the immediate detectors could not be determined. Fig. 16c shows that immediately after the light incidence the photogenerated carriers are spatially modulated.

LB represents the inductance of the bond wire. The stray capacitance of the detector package is considered in CP . 3 pF. The stray capacitance of package pins of discrete photodiodes and of the output pins of integrated circuits is of the order of 1 pF. RS LB LW I ph CD RD Photodiode CB CP Mount RL CI Circuit Fig. 17. Small-signal equivalent input circuit of a photoreceiver RI 22 1 Basics and Theory The lead wires and the wiring on electronic boards introduce the additional inductance LW . The inductances LB and especially LW become important at high frequencies.